An integrated circuit (“IC”) die is a small device formed on a semiconductor wafer, such as a silicon wafer and is typically cut from the wafer, coupled to a flag portion of a leadframe, and electrically connected to power pads of the leadframe via a wirebonding process. The wirebonding process may also be used to cross connect bond pads of the die or to cross connect other leads of the leadframe. The die, bond wires, and leadframe are then encapsulated and singulated from other dice to form a single packaged device.
As technology has advanced, the demand has increased for ICs that are more dense and that do not increase the size or footprint of the packaged device. Additionally, the desire has remained for an increased number of inputs and outputs between the IC and leadframe power pads. Consequently, the densities of connections between the IC die and the leadframe has increased. To produce the desired devices, fine pitch and ultra-fine pitch wire bonding have been utilized, and the bond wire diameters have decreased.
Although the aforementioned changes to the wirebonding technologies have been effective in producing operable ICs, they have certain drawbacks. For example, the decreased pitch and wire diameter may cause difficulties in the handling and the bonding of the bond wire. In particular, the bond wires may unintentionally short to other conductive structures of the packaged device, such as other bond wires, pads, leads, or the die. The bond wires may be more susceptible to shorting during IC die encapsulation as, for example, from “sweeping,” where the injection or transfer of the liquid molding encapsulant may move the bond wires against other conductive structures. To decrease the shorting effect, insulated or coated wires have been used; however, these types of wires are difficult to bond to the bond pads. Some approaches have been used to remove a portion of the wire coating. But, the removal process may require additional equipment, which may increase production time and costs.
Accordingly, it is desirable to have a method for manufacturing an IC die that is simple and cost-efficient to implement. Moreover, it is desirable for the method to yield high quality devices with decreased shorting effects. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.